CVE-2022-49172
HighCVSS 7.8Exploitation Probability (EPSS)
Low risk19th percentile - higher than 19% of all known CVEs
Summary
In the Linux kernel for the parisc architecture, a vulnerability was found involving non-access data TLB cache flush faults. The fdc and fic instructions in flush_user_dcache_range_asm and flush_user_icache_range_asm cause faults that do not invalidate the cache line, potentially leading to memory corruption. The problem was hidden by nullification of the flush instructions.
Risk Assessment
The vulnerability can lead to memory corruption and system crash, and also affects performance due to many TLB faults.
Recommendation
Apply the patch that uses flush_cache_pages() to flush using a temporary alias mapping, and fixes the range flushed in flush_cache_range().
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Original NVD description (English source)
In the Linux kernel, the following vulnerability has been resolved: parisc: Fix non-access data TLB cache flush faults When a page is not present, we get non-access data TLB faults from the fdc and fic instructions in flush_user_dcache_range_asm and flush_user_icache_range_asm. When these occur, the cache line is not invalidated and potentially we get memory corruption. The problem was hidden by the nullification of the flush instructions. These faults also affect performance. With pa8800/pa8900 processors, there will be 32 faults per 4 KB page since the cache line is 128 bytes. There will be more faults with earlier processors. The problem is fixed by using flush_cache_pages(). It does the flush using a tmp alias mapping. The flush_cache_pages() call in flush_cache_range() flushed too large a range. V2: Remove unnecessary preempt_disable() and preempt_enable() calls.

