CVE-2026-90124
UnknownSummary
In the Linux kernel, rzg2l_clear_irq_int() and rzg2l_clear_tint_int() perform a read-modify-write on the ISCR/TSCR status registers to clear the bit for the handled interrupt. Since these registers are write-0-to-clear per bit, a concurrently set status bit for another interrupt is written back as 0, clearing and losing an unserviced interrupt.
Risk Assessment
Lost interrupts may cause peripheral devices to hang or malfunction, especially when multiple interrupts are triggered simultaneously.
Recommendation
Update the Linux kernel to a version with the fix that writes back only the bit being cleared with all other bits set to 1, instead of read-modify-writing the whole register.
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Original NVD description (English source)
In the Linux kernel, the following vulnerability has been resolved: irqchip/renesas-rzg2l: Fix loss of interrupt rzg2l_clear_irq_int() and rzg2l_clear_tint_int() perform a read-modify-write on the ISCR/TSCR status registers to clear the bit for the interrupt just handled. Since these registers are write-0-to-clear per bit, this is racy: If another interrupt's status bit gets set between the read and the write, that bit is written back as 0 by the software-constructed value, clearing an interrupt that hasn't been serviced yet and losing it. This can be reproduced by triggering multiple interrupts at once, e.g.: gpioset -c gpiochip0 355=0 353=0 328=0 352=0 Fix this by writing back only the bit being cleared, with all other bits set to 1, instead of read-modify-writing the whole register. Since 1-bits are left unchanged by hardware, concurrently-set status bits for other interrupts are preserved.
Vulnerability data from NVD (NIST) · CISA KEV · EPSS