CVE Catalog
CVE-2025-51677
CriticalCVSS 9.1Exploitation Probability (EPSS)
Low risk0.43%
35th percentile - higher than 35% of all known CVEs
Summary
An output mismatch between the RTL and the netlist of the or1200 cpu output port in openRISC OR1200 (commit 83ac6b) can lead to unexpected behavior.
Risk Assessment
This flaw may cause unpredictable system behavior, potentially leading to logic errors or security breaches in hardware implementations.
Recommendation
Apply a patch or update the openRISC OR1200 implementation to a version after commit 83ac6b.
Original NVD description (English source)
An issue was discovered in openRISC OR1200 commit 83ac6b. An output mismatch between the RTL and the netlist of the or1200 cpu output port can lead to unexpected behavior.