CVE Catalog

CVE-2023-52481

MediumCVSS 4.7
Published: Updated: Translated: NVD NIST

Exploitation Probability (EPSS)

Low risk
0.60%

46th percentile - higher than 46% of all known CVEs

Summary

In the Linux kernel, a workaround for ARM Cortex-A520 erratum 2966298 was added. On affected cores, speculatively executed unprivileged loads might leak data from privileged loads via a cache side channel. The workaround executes a TLBI before returning to EL0.

Risk Assessment

Risk of leaking privileged data to unprivileged context, potentially allowing a local attacker to access sensitive information.

Recommendation

Apply the Linux kernel update containing the fix for this erratum. Ensure systems with Cortex-A520 cores have the workaround enabled.

Other vulnerabilities in Linux kernel

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Original NVD description (English source)

In the Linux kernel, the following vulnerability has been resolved: arm64: errata: Add Cortex-A520 speculative unprivileged load workaround Implement the workaround for ARM Cortex-A520 erratum 2966298. On an affected Cortex-A520 core, a speculatively executed unprivileged load might leak data from a privileged load via a cache side channel. The issue only exists for loads within a translation regime with the same translation (e.g. same ASID and VMID). Therefore, the issue only affects the return to EL0. The workaround is to execute a TLBI before returning to EL0 after all loads of privileged data. A non-shareable TLBI to any address is sufficient. The workaround isn't necessary if page table isolation (KPTI) is enabled, but for simplicity it will be. Page table isolation should normally be disabled for Cortex-A520 as it supports the CSV3 feature and the E0PD feature (used when KASLR is enabled).

Vulnerability data from NVD (NIST) · CISA KEV · EPSS