CVE Catalog

CVE-2018-5407

MediumCVSS 4.7
Published: Updated: Translated: NVD NIST

Exploitation Probability (EPSS)

High risk
3.42%

89th percentile - higher than 89% of all known CVEs

Summary

Simultaneous Multi-threading (SMT) in processors can enable local users to exploit software vulnerable to timing attacks via a side-channel timing attack on 'port contention'.

Risk Assessment

A local attacker could infer sensitive data (e.g., cryptographic keys) by analyzing execution timing, potentially leading to information disclosure.

Recommendation

Update CPU microcode and cryptographic libraries to the latest versions; consider disabling SMT on systems handling highly sensitive data.

Related vulnerabilities

Original NVD description (English source)

Simultaneous Multi-threading (SMT) in processors can enable local users to exploit software vulnerable to timing attacks via a side-channel timing attack on 'port contention'.

Vulnerability data from NVD (NIST) · CISA KEV · EPSS